1. Field of the Invention
This invention relates to a current control circuit for a dynamic memory used in the field of a speech processing device, image processing device and the like which particularly require a low power consumption.
2. Description of the Related Art
In general, since a dynamic memory necessitates a refresh operation and a through current flowing therein is large, the current consumption in the dynamic memory is large. In the dynamic memory, the through current mainly occurs in a reference potential generation circuit. The reference potential generation circuit is a circuit for supplying a reference potential Vref used for recognizing "1" or "0" of an address to a latch circuit for latching address data.
FIG. 16 shows an example of the conventional reference potential generation circuit. In this circuit, resistors R1 and R2 are serially connected between a first potential Vcc and a second potential Vss and a reference potential Vref is derived from a connection node between the resistors R1 and R2. Therefore, in this type of circuit, a through current will inevitably flow from the first potential Vcc to the second potential Vss.
In addition, a through current may occur in a short-circuited portion of the word line and bit line. When the word line and bit line are short-circuited, the dynamic memory is usually dealt as a defective device. However, when it is compensated by use of the redundancy technique, it may be used as an effective device but a through current occurs in the short-circuited portion.
Recently, it is required to use the dynamic memory in the speech processing and image processing or use the same instead of a magnetic disk. However, as described above, the current consumption in the dynamic memory is large and it is extremely difficult to back up the dynamic memory by means of a battery or the like. Therefore, it is difficult to apply the conventional dynamic memory in the field in which low power consumption is required.
At present, in the field in which low power consumption is required, a static memory is used. However, since the unit price for each bit is extremely high in the static memory than in the dynamic memory, the cost of the circuit becomes extremely high.
In the field in which low power consumption is required, the following methods have been proposed to permit use of the dynamic memory. In a first method, the refresh cycle is set to be longer than the cycle ensured by the data sheet for the standard product so as to reduce a refresh current. In a second method, the power source voltage is lowered in a stand-by state in which no data readout operation is effected. However, the above methods are not considered effective since the memory cell potential is varied and determination of "1" or "0" cannot be correctly made if the power source voltage is varied.